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128Mb: x16 Mobile SDRAM
Operation
Figure 14:
READ-to-PRECHARGE
T0
T1
T2
T3
T4
T5
T6
T7
CLK
t RP
COMMAND
READ
NOP
NOP
NOP
PRECHARGE
NOP
NOP
ACTIVE
X = 1 cycle
ADDRESS
BANK a ,
COL n
BANK
( a or all)
BANK a ,
ROW
DQ
D OUT
n
D OUT
n +1
D OUT
n +2
D OUT
n +3
CL = 2
T0
T1
T2
T3
T4
T5
T6
T7
CLK
t RP
COMMAND
READ
NOP
NOP
NOP
PRECHARGE
NOP
NOP
ACTIVE
X = 2 cycles
ADDRESS
BANK a ,
COL n
BANK
( a or all)
BANK a ,
ROW
DQ
D OUT
n
D OUT
n +1
D OUT
n +2
D OUT
n +3
CL = 3
TRANSITIONING DATA
DON’T CARE
Notes:
1. DQM is LOW.
Figure 15:
Terminating a READ Burst
T0
T1
T2
T3
T4
T5
T6
CLK
COMMAND
READ
NOP
NOP
NOP
BURST
TERMINATE
NOP
NOP
X = 1 cycle
ADDRESS
BANK,
COL n
DQ
D OUT
n
D OUT
n +1
D OUT
n +2
D OUT
n +3
CL = 2
T0
T1
T2
T3
T4
T5
T6
T7
CLK
COMMAND
READ
NOP
NOP
NOP
BURST
TERMINATE
NOP
NOP
NOP
X = 2 cycles
ADDRESS
BANK,
COL n
DQ
D OUT
n
D OUT
n +1
D OUT
n +2
D OUT
n +3
CL = 3
TRANSITIONING DATA
DON’T CARE
Notes:
1. DQM is LOW.
PDF: 09005aef8237e877/Source: 09005aef8237e8d8
128Mb_x16 Mobile SDRAM_Y25M_2.fm - Rev. C 2/07 EN
23
Micron Technology, Inc., reserves the right to change products or specifications without notice.
?2006 Micron Technology, Inc. All rights reserved.
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